Modern computer systems require memory devices with widely varying performance characteristics. A memory unit capable of extremely rapid information retrieval and transmission is often required to supply some modern central processing units (CPUs) with instructions and data for their operation. Such memories are available, usually in the form of Random Access Memories (RAMs), and are commonly called `cache` memories. These caches are generally small, on the order of a few thousand bytes, in order to allow the rapid retrieval of data. Since there are few complete programs or data bases that can be stored in memories of that size, computer systems also incorporate memories with larger capacities, but slower access and retrieval times. These memories can include larger RAMs with slower retrieval speeds, bubble memories, disc memories of various types and other memories.
A commonly used method to optimize computer operations is to couple a cache memory directly to the CPU and another, larger, memory unit to both the cache memory and the CPU. In this manner the cache can supply the CPU with the instructions and data needed immediately at a rate which will allow unimpeded CPU operation. The main memory usually supplies refill data to the cache, keeping it full. If an instruction or a required piece of data is not in the cache when the CPU requires it, it can be obtained from the main memory, at the expense of the extra time that this requires.
A problem which arises with caches which use virtual memory mapping occurs when the cache is cleared or flushed.
A memory can be mapped in at least two ways. The first is physical mapping where instructions refer to the actual physical address where the required data is stored. The second way is virtual mapping. Here, the instruction refers to a virtual address which must be translated in some fashion to obtain the physical address where the data is stored. Virtual mapping allows better main memory utilization and is particularly useful in multiprogramming environments as the memory can be allocated without contiguous partitions between the users. Both physically and virtually mapped caches are currently being used in computer design.
The physical location of the cache memory also plays an important role in optimizing computer operation. CPU operations are performed with virtual addresses. If the computer system uses a virtually mapped cache it becomes advantageous to couple the cache directly to the CPU. Any translation from virtual to physical addresses which needs to occur can be accomplished downstream from the cache.
For a number of reasons, such as when a new program is run, the virtual to physical address translation map of a virtually mapped cache changes. When this occurs, the cache must be flushed (cleared) and replaced with a new map.
After the cache is flushed, it is refilled with new data and instructions. In the prior art, after the cache was flushed, it was refilled at the same rate that data or instructions were fed to the cache when a given program was being run for a long period of time. Caches work most efficiently when completely full as fewer attempts to find data or instructions in the cache result in misses that require a search of main memory. Consequently, when the cache was refilled at a constant rate after flushing, numerous "misses" requiring reference to and response from the main memory occurred, resulting in inefficient cache utilization. On the other hand, if the cache is continually refilled or refreshed at a very high rate, other problems occur, such as writing over data or instructions which are still current and useful.
It is an object of this invention to provide a mechanism whereby the cache can be filled at at least two different rates, a fast rate being used immediately after the cache has been cleared and a slower rate being used once the cache has been almost completely refilled.